uart beginnings (fragile handle with care)
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112
src/main.rs
112
src/main.rs
@@ -1,13 +1,104 @@
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#![no_std]
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#![no_main]
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use core::ptr;
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use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics
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use cortex_m_rt::entry;
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use driver_and_task_library::{
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setup_board, Function, Pin, Port, PortOptions, ReadablePinOptions, WritablePinOptions, H, L,
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setup_board, Function, Pin, Port, PortOptions, ReadablePinOptions, WritablePinOptions, H, L, UsableBoard,
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};
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const SYSCTL_RCGC1_R: *mut u32 = 0x400FE104 as *mut u32;
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const SYSCTL_RCGC2_R: *mut u32 = 0x400FE108 as *mut u32;
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const UART0_DR_R: *mut u32 = 0x4000C000 as *mut u32;
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const UART0_FR_R: *mut u32 = 0x4000C018 as *mut u32;
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const UART0_IBRD_R: *mut u32 = 0x4000C024 as *mut u32;
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const UART0_FBRD_R: *mut u32 = 0x4000C028 as *mut u32;
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const UART0_LCRH_R: *mut u32 = 0x4000C02C as *mut u32;
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const UART0_CTL_R: *mut u32 = 0x4000C030 as *mut u32;
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const GPIO_PORTA_AFSEL_R: *mut u32 = 0x40004420 as *mut u32;
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const GPIO_PORTA_DEN_R: *mut u32 = 0x4000451C as *mut u32;
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/// UART0 Clock Gating Control
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const SYSCTL_RCGC1_UART0: u32 = 0x00000001;
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/// port A Clock Gating Control
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const SYSCTL_RCGC2_GPIOA: u32 = 0x00000001;
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/// UART Enable
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const UART_CTL_UARTEN: u32 = 0x00000001;
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/// 8 bit word length
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const UART_LCRH_WLEN_8: u32 = 0x00000060;
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/// UART Enable FIFOs
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const UART_LCRH_FEN: u32 = 0x00000010;
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/// UART Transmit FIFO Full
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const UART_FR_TXFF: u32 = 0x00000020;
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/// UART Receive FIFO Empty
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const UART_FR_RXFE: u32 = 0x00000010;
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/// Pins 0 and 1
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const PINS_0_AND_1: u32 = 0b0000_0011;
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fn uart0_init(board: UsableBoard) {
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unsafe {
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// activate UART0
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ptr::write_volatile(SYSCTL_RCGC1_R, ptr::read_volatile(SYSCTL_RCGC1_R) | SYSCTL_RCGC1_UART0);
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// activate port A
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// ptr::write_volatile(SYSCTL_RCGC2_R, ptr::read_volatile(SYSCTL_RCGC2_R) | SYSCTL_RCGC2_GPIOA);
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// ^ commented in favor of v
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board.setup_gpio_port(Port::A, PortOptions);
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// disable UART while setting it up
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ptr::write_volatile(UART0_CTL_R, ptr::read_volatile(UART0_CTL_R) & !UART_CTL_UARTEN);
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// ignore: // IBRD = int(50,000,000 / (16 * 115,200)) = int(27.1267)
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// IBRD = int(16,000,000 / (16 * 115,200)) = int(8.680)
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// ptr::write_volatile(UART0_IBRD_R, 8);
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ptr::write_volatile(UART0_IBRD_R, 8);
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// ignore: // FBRD = int(0.1267 * 64 + 0.5) = 8
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// FBRD = round(0.5104 * 64 ) = 33 --- that ain't the number you wrote but ok
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// ptr::write_volatile(UART0_FBRD_R, 44);
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ptr::write_volatile(UART0_FBRD_R, 44);
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// 8 bit word length (no parity bits, one stop bit, FIFOs)
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// ptr::write_volatile(UART0_LCRH_R, UART_LCRH_WLEN_8|UART_LCRH_FEN);
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// 8 bit word length (no parity bits, one stop bit, no FIFOs)
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ptr::write_volatile(UART0_LCRH_R, UART_LCRH_WLEN_8&!UART_LCRH_FEN);
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// enable UART since it's been set up
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ptr::write_volatile(UART0_CTL_R, ptr::read_volatile(UART0_CTL_R) | UART_CTL_UARTEN);
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// enable alt funct on PA1-0
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ptr::write_volatile(GPIO_PORTA_AFSEL_R, ptr::read_volatile(GPIO_PORTA_AFSEL_R) | PINS_0_AND_1);
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// enable digital I/O on PA1-0
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ptr::write_volatile(GPIO_PORTA_DEN_R, ptr::read_volatile(GPIO_PORTA_AFSEL_R) | PINS_0_AND_1);
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}
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}
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fn uart0_out_char(c: u8) {
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loop {
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let fr = unsafe {
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ptr::read_volatile(UART0_FR_R)
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};
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if (fr & UART_FR_TXFF) == 0 {
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break;
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}
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}
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unsafe {
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ptr::write_volatile(UART0_DR_R, c as u32);
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}
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}
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fn uart0_out_string(s: &str) {
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for c in s.bytes() {
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uart0_out_char(c);
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}
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}
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#[entry]
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fn main() -> ! {
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let board = setup_board();
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@@ -39,7 +130,24 @@ fn main() -> ! {
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let blue = [L, L, H];
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let magenta = [H, L, H];
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let _rainbow = [red, yellow, green, cyan, blue, magenta];
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let rainbow = [red, yellow, green, cyan, blue, magenta];
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rgb_led.write_all(cyan);
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uart0_init(board);
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rgb_led.write_all(white);
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for _ in 0..2 {
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for c in ['H', 'a', 'y', '!', '\n', 'H', 'e', 'y', '!', '\n', 'H', 'e', 'y', '!', '\n', 'H', 'e', 'y', '!', '\n', ] {
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uart0_out_char(c as u8);
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}
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}
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uart0_out_string("Those example string!\n");
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loop {
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match switches.read_all() {
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