75 lines
1.9 KiB
Rust
75 lines
1.9 KiB
Rust
//! Data sheet: https://www.ti.com/lit/ds/spms376e/spms376e.pdf
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use core::arch::asm;
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use crate::gpio::ports::{
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setup_port as setup_gpio_port, Port as GPIOPort, UsablePort as UsableGPIOPort,
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};
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use crate::uart::{
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setup_port as setup_uart_port, Port as UARTPort, PortOptions as UARTPortOptions,
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UsablePort as UsableUARTPort,
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};
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/// The board
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///
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/// Houses memory addresses of registers
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#[derive(Clone, Copy)]
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pub struct Board;
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impl Board {
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/// Page 231 of data sheet
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const fn base(&self) -> u32 {
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0x400F_E000
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}
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/// The memory address of the GPIO Run mode clock gating control (RCGCGPIO) register for GPIO ports
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///
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/// Page 340 of data sheet
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pub(crate) const fn gpio_run_mode_clock_gating_control(&self) -> *mut u32 {
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const OFFSET: u32 = 0x608;
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(self.base() + OFFSET) as *mut u32
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}
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/// The memory address of the run mode clock gating control 1 (RCGC1) register for the system
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///
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/// Page (ran out of time) of data sheet
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pub(crate) const fn run_mode_clock_gating_control_1(&self) -> *mut u32 {
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const OFFSET: u32 = 0x104;
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(self.base() + OFFSET) as *mut u32
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}
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}
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/// A setup version of the board that GPIO and UART ports can be set up on
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pub struct UsableBoard {
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board: Board,
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}
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impl UsableBoard {
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pub(crate) fn no_op(&self) {
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unsafe {
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asm!("nop");
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}
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}
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pub(crate) fn no_ops(&self, n: u32) {
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for _ in 0..n {
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self.no_op();
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}
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}
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}
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impl UsableBoard {
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pub fn setup_gpio_port(&mut self, port: GPIOPort) -> UsableGPIOPort {
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setup_gpio_port(self.board, port)
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}
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pub fn setup_uart_port(&mut self, port: UARTPort, options: UARTPortOptions) -> UsableUARTPort {
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setup_uart_port(self.board, port, options, &|n| self.no_ops(n))
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}
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}
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/// Start using the driver and task library by setting up the TM4C123GXL board
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pub fn setup_board() -> UsableBoard {
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UsableBoard { board: Board }
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}
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