From 273d9308ec6c682ba7e048bc0c21225e75d474c9 Mon Sep 17 00:00:00 2001 From: J / Jacob Babich Date: Wed, 13 Apr 2022 14:13:33 -0400 Subject: [PATCH] add stuff --- .cargo/config.toml | 18 ----- README.md | 135 ------------------------------------- examples/allocator.rs | 56 ---------------- examples/crash.rs | 96 --------------------------- examples/device.rs | 62 ----------------- examples/exception.rs | 37 ----------- examples/hello.rs | 20 ------ examples/itm.rs | 33 ---------- examples/panic.rs | 28 -------- examples/test_on_host.rs | 57 ---------------- src/lib/memory.rs | 14 ++-- src/lib/mod.rs | 139 +++++++++++++++++++++++++++++---------- src/main--ideas.rs | 59 +++++++++++++++++ src/main.rs | 74 +++++++++++---------- 14 files changed, 212 insertions(+), 616 deletions(-) delete mode 100644 README.md delete mode 100644 examples/allocator.rs delete mode 100644 examples/crash.rs delete mode 100644 examples/device.rs delete mode 100644 examples/exception.rs delete mode 100644 examples/hello.rs delete mode 100644 examples/itm.rs delete mode 100644 examples/panic.rs delete mode 100644 examples/test_on_host.rs create mode 100644 src/main--ideas.rs diff --git a/.cargo/config.toml b/.cargo/config.toml index 9d9a5e9..903732e 100644 --- a/.cargo/config.toml +++ b/.cargo/config.toml @@ -1,13 +1,6 @@ [target.thumbv7m-none-eabi] -# uncomment this to make `cargo run` execute programs on QEMU -# runner = "qemu-system-arm -cpu cortex-m3 -machine lm3s6965evb -nographic -semihosting-config enable=on,target=native -kernel" [target.'cfg(all(target_arch = "arm", target_os = "none"))'] -# uncomment ONE of these three option to make `cargo run` start a GDB session -# which option to pick depends on your system -# runner = "arm-none-eabi-gdb -q -x openocd.gdb" -# runner = "gdb-multiarch -q -x openocd.gdb" -# runner = "gdb -q -x openocd.gdb" rustflags = [ # This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x @@ -16,17 +9,6 @@ rustflags = [ # LLD (shipped with the Rust toolchain) is used as the default linker "-C", "link-arg=-Tlink.x", - - # if you run into problems with LLD switch to the GNU linker by commenting out - # this line - # "-C", "linker=arm-none-eabi-ld", - - # if you need to link to pre-compiled C libraries provided by a C toolchain - # use GCC as the linker by commenting out both lines above and then - # uncommenting the three lines below - # "-C", "linker=arm-none-eabi-gcc", - # "-C", "link-arg=-Wl,-Tlink.x", - # "-C", "link-arg=-nostartfiles", ] [build] diff --git a/README.md b/README.md deleted file mode 100644 index 293c092..0000000 --- a/README.md +++ /dev/null @@ -1,135 +0,0 @@ -# `cortex-m-quickstart` - -> A template for building applications for ARM Cortex-M microcontrollers - -This project is developed and maintained by the [Cortex-M team][team]. - -## Dependencies - -To build embedded programs using this template you'll need: - -- Rust 1.31, 1.30-beta, nightly-2018-09-13 or a newer toolchain. e.g. `rustup - default beta` - -- The `cargo generate` subcommand. [Installation - instructions](https://github.com/ashleygwilliams/cargo-generate#installation). - -- `rust-std` components (pre-compiled `core` crate) for the ARM Cortex-M - targets. Run: - -``` console -$ rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabi thumbv7em-none-eabihf -``` - -## Using this template - -**NOTE**: This is the very short version that only covers building programs. For -the long version, which additionally covers flashing, running and debugging -programs, check [the embedded Rust book][book]. - -[book]: https://rust-embedded.github.io/book - -0. Before we begin you need to identify some characteristics of the target - device as these will be used to configure the project: - -- The ARM core. e.g. Cortex-M3. - -- Does the ARM core include an FPU? Cortex-M4**F** and Cortex-M7**F** cores do. - -- How much Flash memory and RAM does the target device has? e.g. 256 KiB of - Flash and 32 KiB of RAM. - -- Where are Flash memory and RAM mapped in the address space? e.g. RAM is - commonly located at address `0x2000_0000`. - -You can find this information in the data sheet or the reference manual of your -device. - -In this example we'll be using the STM32F3DISCOVERY. This board contains an -STM32F303VCT6 microcontroller. This microcontroller has: - -- A Cortex-M4F core that includes a single precision FPU - -- 256 KiB of Flash located at address 0x0800_0000. - -- 40 KiB of RAM located at address 0x2000_0000. (There's another RAM region but - for simplicity we'll ignore it). - -1. Instantiate the template. - -``` console -$ cargo generate --git https://github.com/rust-embedded/cortex-m-quickstart - Project Name: app - Creating project called `app`... - Done! New project created /tmp/app - -$ cd app -``` - -2. Set a default compilation target. There are four options as mentioned at the - bottom of `.cargo/config`. For the STM32F303VCT6, which has a Cortex-M4F - core, we'll pick the `thumbv7em-none-eabihf` target. - -``` console -$ tail -n6 .cargo/config -``` - -``` toml -[build] -# Pick ONE of these compilation targets -# target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+ -# target = "thumbv7m-none-eabi" # Cortex-M3 -# target = "thumbv7em-none-eabi" # Cortex-M4 and Cortex-M7 (no FPU) -target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) -``` - -3. Enter the memory region information into the `memory.x` file. - -``` console -$ cat memory.x -/* Linker script for the STM32F303VCT6 */ -MEMORY -{ - /* NOTE 1 K = 1 KiBi = 1024 bytes */ - FLASH : ORIGIN = 0x08000000, LENGTH = 256K - RAM : ORIGIN = 0x20000000, LENGTH = 40K -} -``` - -4. Build the template application or one of the examples. - -``` console -$ cargo build -``` - -## VS Code - -This template includes launch configurations for debugging CortexM programs with Visual Studio Code located in the `.vscode/` directory. -See [.vscode/README.md](./.vscode/README.md) for more information. -If you're not using VS Code, you can safely delete the directory from the generated project. - -# License - -This template is licensed under either of - -- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or - http://www.apache.org/licenses/LICENSE-2.0) - -- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT) - -at your option. - -## Contribution - -Unless you explicitly state otherwise, any contribution intentionally submitted -for inclusion in the work by you, as defined in the Apache-2.0 license, shall be -dual licensed as above, without any additional terms or conditions. - -## Code of Conduct - -Contribution to this crate is organized under the terms of the [Rust Code of -Conduct][CoC], the maintainer of this crate, the [Cortex-M team][team], promises -to intervene to uphold that code of conduct. - -[CoC]: https://www.rust-lang.org/policies/code-of-conduct -[team]: https://github.com/rust-embedded/wg#the-cortex-m-team diff --git a/examples/allocator.rs b/examples/allocator.rs deleted file mode 100644 index 53c3023..0000000 --- a/examples/allocator.rs +++ /dev/null @@ -1,56 +0,0 @@ -//! How to use the heap and a dynamic memory allocator -//! -//! This example depends on the alloc-cortex-m crate so you'll have to add it to your Cargo.toml: -//! -//! ``` text -//! # or edit the Cargo.toml file manually -//! $ cargo add alloc-cortex-m -//! ``` -//! -//! --- - -#![feature(alloc_error_handler)] -#![no_main] -#![no_std] - -extern crate alloc; -use panic_halt as _; - -use self::alloc::vec; -use core::alloc::Layout; - -use alloc_cortex_m::CortexMHeap; -use cortex_m::asm; -use cortex_m_rt::entry; -use cortex_m_semihosting::{hprintln, debug}; - -// this is the allocator the application will use -#[global_allocator] -static ALLOCATOR: CortexMHeap = CortexMHeap::empty(); - -const HEAP_SIZE: usize = 1024; // in bytes - -#[entry] -fn main() -> ! { - // Initialize the allocator BEFORE you use it - unsafe { ALLOCATOR.init(cortex_m_rt::heap_start() as usize, HEAP_SIZE) } - - // Growable array allocated on the heap - let xs = vec![0, 1, 2]; - - hprintln!("{:?}", xs).unwrap(); - - // exit QEMU - // NOTE do not run this on hardware; it can corrupt OpenOCD state - debug::exit(debug::EXIT_SUCCESS); - - loop {} -} - -// define what happens in an Out Of Memory (OOM) condition -#[alloc_error_handler] -fn alloc_error(_layout: Layout) -> ! { - asm::bkpt(); - - loop {} -} diff --git a/examples/crash.rs b/examples/crash.rs deleted file mode 100644 index ab2d47b..0000000 --- a/examples/crash.rs +++ /dev/null @@ -1,96 +0,0 @@ -//! Debugging a crash (exception) -//! -//! Most crash conditions trigger a hard fault exception, whose handler is defined via -//! `exception!(HardFault, ..)`. The `HardFault` handler has access to the exception frame, a -//! snapshot of the CPU registers at the moment of the exception. -//! -//! This program crashes and the `HardFault` handler prints to the console the contents of the -//! `ExceptionFrame` and then triggers a breakpoint. From that breakpoint one can see the backtrace -//! that led to the exception. -//! -//! ``` text -//! (gdb) continue -//! Program received signal SIGTRAP, Trace/breakpoint trap. -//! __bkpt () at asm/bkpt.s:3 -//! 3 bkpt -//! -//! (gdb) backtrace -//! #0 __bkpt () at asm/bkpt.s:3 -//! #1 0x080030b4 in cortex_m::asm::bkpt () at $$/cortex-m-0.5.0/src/asm.rs:19 -//! #2 rust_begin_unwind (args=..., file=..., line=99, col=5) at $$/panic-semihosting-0.2.0/src/lib.rs:87 -//! #3 0x08001d06 in core::panicking::panic_fmt () at libcore/panicking.rs:71 -//! #4 0x080004a6 in crash::hard_fault (ef=0x20004fa0) at examples/crash.rs:99 -//! #5 0x08000548 in UserHardFault (ef=0x20004fa0) at :10 -//! #6 0x0800093a in HardFault () at asm.s:5 -//! Backtrace stopped: previous frame identical to this frame (corrupt stack?) -//! ``` -//! -//! In the console output one will find the state of the Program Counter (PC) register at the time -//! of the exception. -//! -//! ``` text -//! panicked at 'HardFault at ExceptionFrame { -//! r0: 0x2fffffff, -//! r1: 0x2fffffff, -//! r2: 0x080051d4, -//! r3: 0x080051d4, -//! r12: 0x20000000, -//! lr: 0x08000435, -//! pc: 0x08000ab6, -//! xpsr: 0x61000000 -//! }', examples/crash.rs:106:5 -//! ``` -//! -//! This register contains the address of the instruction that caused the exception. In GDB one can -//! disassemble the program around this address to observe the instruction that caused the -//! exception. -//! -//! ``` text -//! (gdb) disassemble/m 0x08000ab6 -//! Dump of assembler code for function core::ptr::read_volatile: -//! 451 pub unsafe fn read_volatile(src: *const T) -> T { -//! 0x08000aae <+0>: sub sp, #16 -//! 0x08000ab0 <+2>: mov r1, r0 -//! 0x08000ab2 <+4>: str r0, [sp, #8] -//! -//! 452 intrinsics::volatile_load(src) -//! 0x08000ab4 <+6>: ldr r0, [sp, #8] -//! -> 0x08000ab6 <+8>: ldr r0, [r0, #0] -//! 0x08000ab8 <+10>: str r0, [sp, #12] -//! 0x08000aba <+12>: ldr r0, [sp, #12] -//! 0x08000abc <+14>: str r1, [sp, #4] -//! 0x08000abe <+16>: str r0, [sp, #0] -//! 0x08000ac0 <+18>: b.n 0x8000ac2 -//! -//! 453 } -//! 0x08000ac2 <+20>: ldr r0, [sp, #0] -//! 0x08000ac4 <+22>: add sp, #16 -//! 0x08000ac6 <+24>: bx lr -//! -//! End of assembler dump. -//! ``` -//! -//! `ldr r0, [r0, #0]` caused the exception. This instruction tried to load (read) a 32-bit word -//! from the address stored in the register `r0`. Looking again at the contents of `ExceptionFrame` -//! we see that the `r0` contained the address `0x2FFF_FFFF` when this instruction was executed. -//! -//! --- - -#![no_main] -#![no_std] - -use panic_halt as _; - -use core::ptr; - -use cortex_m_rt::entry; - -#[entry] -fn main() -> ! { - unsafe { - // read an address outside of the RAM region; this causes a HardFault exception - ptr::read_volatile(0x2FFF_FFFF as *const u32); - } - - loop {} -} diff --git a/examples/device.rs b/examples/device.rs deleted file mode 100644 index a1a219c..0000000 --- a/examples/device.rs +++ /dev/null @@ -1,62 +0,0 @@ -//! Using a device crate -//! -//! Crates generated using [`svd2rust`] are referred to as device crates. These crates provide an -//! API to access the peripherals of a device. -//! -//! [`svd2rust`]: https://crates.io/crates/svd2rust -//! -//! This example depends on the [`stm32f3`] crate so you'll have to -//! uncomment it in your Cargo.toml. -//! -//! [`stm32f3`]: https://crates.io/crates/stm32f3 -//! -//! ``` -//! $ edit Cargo.toml && tail $_ -//! [dependencies.stm32f3] -//! features = ["stm32f303", "rt"] -//! version = "0.7.1" -//! ``` -//! -//! You also need to set the build target to thumbv7em-none-eabihf, -//! typically by editing `.cargo/config` and uncommenting the relevant target line. -//! -//! --- - -#![no_main] -#![no_std] - -#[allow(unused_extern_crates)] -use panic_halt as _; - -use cortex_m::peripheral::syst::SystClkSource; -use cortex_m_rt::entry; -use cortex_m_semihosting::hprint; -use stm32f3::stm32f303::{interrupt, Interrupt, NVIC}; - -#[entry] -fn main() -> ! { - let p = cortex_m::Peripherals::take().unwrap(); - - let mut syst = p.SYST; - let mut nvic = p.NVIC; - - nvic.enable(Interrupt::EXTI0); - - // configure the system timer to wrap around every second - syst.set_clock_source(SystClkSource::Core); - syst.set_reload(8_000_000); // 1s - syst.enable_counter(); - - loop { - // busy wait until the timer wraps around - while !syst.has_wrapped() {} - - // trigger the `EXTI0` interrupt - NVIC::pend(Interrupt::EXTI0); - } -} - -#[interrupt] -fn EXTI0() { - hprint!(".").unwrap(); -} diff --git a/examples/exception.rs b/examples/exception.rs deleted file mode 100644 index 5edb487..0000000 --- a/examples/exception.rs +++ /dev/null @@ -1,37 +0,0 @@ -//! Overriding an exception handler -//! -//! You can override an exception handler using the [`#[exception]`][1] attribute. -//! -//! [1]: https://rust-embedded.github.io/cortex-m-rt/0.6.1/cortex_m_rt_macros/fn.exception.html -//! -//! --- - -#![deny(unsafe_code)] -#![no_main] -#![no_std] - -use panic_halt as _; - -use cortex_m::peripheral::syst::SystClkSource; -use cortex_m::Peripherals; -use cortex_m_rt::{entry, exception}; -use cortex_m_semihosting::hprint; - -#[entry] -fn main() -> ! { - let p = Peripherals::take().unwrap(); - let mut syst = p.SYST; - - // configures the system timer to trigger a SysTick exception every second - syst.set_clock_source(SystClkSource::Core); - syst.set_reload(8_000_000); // period = 1s - syst.enable_counter(); - syst.enable_interrupt(); - - loop {} -} - -#[exception] -fn SysTick() { - hprint!(".").unwrap(); -} diff --git a/examples/hello.rs b/examples/hello.rs deleted file mode 100644 index 7069991..0000000 --- a/examples/hello.rs +++ /dev/null @@ -1,20 +0,0 @@ -//! Prints "Hello, world!" on the host console using semihosting - -#![no_main] -#![no_std] - -use panic_halt as _; - -use cortex_m_rt::entry; -use cortex_m_semihosting::{debug, hprintln}; - -#[entry] -fn main() -> ! { - hprintln!("Hello, world!").unwrap(); - - // exit QEMU - // NOTE do not run this on hardware; it can corrupt OpenOCD state - // debug::exit(debug::EXIT_SUCCESS); - - loop {} -} diff --git a/examples/itm.rs b/examples/itm.rs deleted file mode 100644 index 82f4150..0000000 --- a/examples/itm.rs +++ /dev/null @@ -1,33 +0,0 @@ -//! Sends "Hello, world!" through the ITM port 0 -//! -//! ITM is much faster than semihosting. Like 4 orders of magnitude or so. -//! -//! **NOTE** Cortex-M0 chips don't support ITM. -//! -//! You'll have to connect the microcontroller's SWO pin to the SWD interface. Note that some -//! development boards don't provide this option. -//! -//! You'll need [`itmdump`] to receive the message on the host plus you'll need to uncomment two -//! `monitor` commands in the `.gdbinit` file. -//! -//! [`itmdump`]: https://docs.rs/itm/0.2.1/itm/ -//! -//! --- - -#![no_main] -#![no_std] - -use panic_halt as _; - -use cortex_m::{iprintln, Peripherals}; -use cortex_m_rt::entry; - -#[entry] -fn main() -> ! { - let mut p = Peripherals::take().unwrap(); - let stim = &mut p.ITM.stim[0]; - - iprintln!(stim, "Hello, world!"); - - loop {} -} diff --git a/examples/panic.rs b/examples/panic.rs deleted file mode 100644 index 94a51b7..0000000 --- a/examples/panic.rs +++ /dev/null @@ -1,28 +0,0 @@ -//! Changing the panicking behavior -//! -//! The easiest way to change the panicking behavior is to use a different [panic handler crate][0]. -//! -//! [0]: https://crates.io/keywords/panic-impl - -#![no_main] -#![no_std] - -// Pick one of these panic handlers: - -// `panic!` halts execution; the panic message is ignored -use panic_halt as _; - -// Reports panic messages to the host stderr using semihosting -// NOTE to use this you need to uncomment the `panic-semihosting` dependency in Cargo.toml -// use panic_semihosting as _; - -// Logs panic messages using the ITM (Instrumentation Trace Macrocell) -// NOTE to use this you need to uncomment the `panic-itm` dependency in Cargo.toml -// use panic_itm as _; - -use cortex_m_rt::entry; - -#[entry] -fn main() -> ! { - panic!("Oops") -} diff --git a/examples/test_on_host.rs b/examples/test_on_host.rs deleted file mode 100644 index c831f11..0000000 --- a/examples/test_on_host.rs +++ /dev/null @@ -1,57 +0,0 @@ -//! Conditionally compiling tests with std and our executable with no_std. -//! -//! Rust's built in unit testing framework requires the standard library, -//! but we need to build our final executable with no_std. -//! The testing framework also generates a `main` method, so we need to only use the `#[entry]` -//! annotation when building our final image. -//! For more information on why this example works, see this excellent blog post. -//! https://os.phil-opp.com/unit-testing/ -//! -//! Running this example: -//! -//! Ensure there are no targets specified under `[build]` in `.cargo/config` -//! In order to make this work, we lose the convenience of having a default target that isn't the -//! host. -//! -//! cargo build --example test_on_host --target thumbv7m-none-eabi -//! cargo test --example test_on_host - -#![cfg_attr(test, allow(unused_imports))] - -#![cfg_attr(not(test), no_std)] -#![cfg_attr(not(test), no_main)] - -// pick a panicking behavior -#[cfg(not(test))] -use panic_halt as _; // you can put a breakpoint on `rust_begin_unwind` to catch panics -// use panic_abort as _; // requires nightly -// use panic_itm as _; // logs messages over ITM; requires ITM support -// use panic_semihosting as _; // logs messages to the host stderr; requires a debugger - -use cortex_m::asm; -use cortex_m_rt::entry; - -#[cfg(not(test))] -#[entry] -fn main() -> ! { - asm::nop(); // To not have main optimize to abort in release mode, remove when you add code - - loop { - // your code goes here - } -} - -fn add(a: i32, b: i32) -> i32 { - a + b -} - -#[cfg(test)] -mod test { - use super::*; - - #[test] - fn foo() { - println!("tests work!"); - assert!(2 == add(1,1)); - } -} diff --git a/src/lib/memory.rs b/src/lib/memory.rs index 8ca199f..8a9cdf7 100644 --- a/src/lib/memory.rs +++ b/src/lib/memory.rs @@ -2,7 +2,7 @@ use core::ptr; -use crate::{Bit, L}; +use crate::L; pub unsafe fn read(address: *mut u32) -> u32 { ptr::read_volatile(address) @@ -41,11 +41,15 @@ pub unsafe fn write_bits(address: *mut u32, bits: &[u32; N], val }) } -pub unsafe fn update_bits [bool; N]>(address: *mut u32, bits: &[Bit; N], updater: Updater) { +pub unsafe fn update_bits [bool; N], const N: usize>( + address: *mut u32, + bits: &[u32; N], + updater: Updater, +) { write_bits(address, bits, updater(read_bits(address, bits))) } -pub unsafe fn set_bits(address: *mut u32, bits: &[Bit]) { +pub unsafe fn set_bits(address: *mut u32, bits: &[u32]) { update(address, |current| { let mut new = current; @@ -57,7 +61,7 @@ pub unsafe fn set_bits(address: *mut u32, bits: &[Bit]) { new }) } -pub unsafe fn clear_bits(address: *mut u32, bits: &[Bit]) { +pub unsafe fn clear_bits(address: *mut u32, bits: &[u32]) { update(address, |current| { let mut new = current; @@ -69,7 +73,7 @@ pub unsafe fn clear_bits(address: *mut u32, bits: &[Bit]) { new }) } -pub unsafe fn toggle_bits(address: *mut u32, bits: &[Bit]) { +pub unsafe fn toggle_bits(address: *mut u32, bits: &[u32]) { update(address, |current| { let mut new = current; diff --git a/src/lib/mod.rs b/src/lib/mod.rs index 10751a1..569e474 100644 --- a/src/lib/mod.rs +++ b/src/lib/mod.rs @@ -15,9 +15,12 @@ impl Board { let port_io = PortIO { port }; unsafe { - memory::set_bits(registers::system::RCGCGPIO, &[port_io.run_mode_clock_gate_control()]); + memory::set_bits( + registers::system::RCGCGPIO, + &[port_io.run_mode_clock_gate_control() as u32], + ); } - + port_io } } @@ -40,7 +43,17 @@ pub struct PortIO { port: Port, } +// TODO: refactor to just be self.base() + offset all the time - no matching impl PortIO { + /// The memory address of the alternate function select (AFSEL) register for this port + fn alternate_function_select(&self) -> *mut u32 { + match self.port { + Port::A => registers::gpio::afsel::PORT_A, + Port::F => registers::gpio::afsel::PORT_F, + _ => todo!(), + } + } + /// The memory address of the analog mode select (AMSEL) register for this port fn analog_mode_select(&self) -> *mut u32 { match self.port { @@ -92,7 +105,6 @@ impl PortIO { Port::A => registers::gpio::pctl::PORT_A, Port::F => registers::gpio::pctl::PORT_F, _ => todo!(), - } } @@ -118,7 +130,6 @@ impl PortIO { // Apparently also for ADC! } - impl PortIO { /// The corresponding bit for this port in system's run-mode clock gate control (RCGC) register fn run_mode_clock_gate_control(&self) -> Bit { @@ -143,25 +154,58 @@ impl PortIO { unsafe { memory::write(self.lock(), UNLOCK); - memory::set_bits(self.commit(), bits); + memory::set_bits(self.commit(), &bits.map(|bit| bit as u32)); } // Disable analog when it's not selected (and enable analog if it is) match options.function { Function::Analog => unsafe { - memory::set_bits(self.analog_mode_select(), bits); + memory::set_bits(self.analog_mode_select(), &bits.map(|bit| bit as u32)); }, _ => unsafe { - memory::clear_bits(self.analog_mode_select(), bits); + memory::clear_bits(self.analog_mode_select(), &bits.map(|bit| bit as u32)); }, } unsafe { - memory::clear_bits(self.direction(), bits); + memory::clear_bits(self.direction(), &bits.map(|bit| bit as u32)); } + + + for bit in bits { + let mut memory_bits = [0; 4]; + + let min = (*bit as u32) * 4; + let max = min + 3; + let range = min..=max; + + for (i, memory_bit) in range.enumerate() { + memory_bits[i] = memory_bit; + } + + let values = match options.function { + Function::Analog => todo!(), + Function::Digital => [L, L, L, L], + Function::CAN => todo!(), + Function::I2C => todo!(), + Function::PWM => todo!(), + Function::UART => todo!(), + }; + unsafe { + memory::write_bits(self.port_control(), &memory_bits, values); + } + } + + // TODO: finish + match options.pull_up { + Some(true) => todo!(), + Some(false) => todo!(), + None => todo!(), + } + let data_address = self.data(); let pins: [ReadablePin; N] = bits.map(|bit| ReadablePin { data_address, bit }); @@ -178,35 +222,44 @@ impl PortIO { unsafe { memory::write(self.lock(), UNLOCK); - memory::set_bits(self.commit(), bits); + memory::set_bits(self.commit(), &bits.map(|bit| bit as u32)); } // Disable analog when it's not selected (and enable analog if it is) match options.function { Function::Analog => unsafe { - memory::set_bits(self.analog_mode_select(), bits); + memory::set_bits(self.analog_mode_select(), &bits.map(|bit| bit as u32)); }, _ => unsafe { - memory::clear_bits(self.analog_mode_select(), bits); + memory::clear_bits(self.analog_mode_select(), &bits.map(|bit| bit as u32)); }, } unsafe { - memory::set_bits(self.direction(), bits); + memory::set_bits(self.direction(), &bits.map(|bit| bit as u32)); } - unsafe { - for bit in bits { - let memory_bits = [0; N]; - let values = match options.function { - Function::Analog => todo!(), - Function::Digital => todo!(), - Function::CAN => todo!(), - Function::I2C => todo!(), - Function::PWM => todo!(), - Function::UART => todo!(), - }; - memory::write_bits(self.port_control(), memory_bits, values); + for bit in bits { + let mut memory_bits = [0; 4]; + + let min = (*bit as u32) * 4; + let max = min + 3; + let range = min..=max; + + for (i, memory_bit) in range.enumerate() { + memory_bits[i] = memory_bit; + } + + let values = match options.function { + Function::Analog => todo!(), + Function::Digital => [L, L, L, L], + Function::CAN => todo!(), + Function::I2C => todo!(), + Function::PWM => todo!(), + Function::UART => todo!(), + }; + unsafe { + memory::write_bits(self.port_control(), &memory_bits, values); } } @@ -214,6 +267,19 @@ impl PortIO { // TODO: finish + match options.function { + Function::Analog | Function::Digital => { + unsafe { + memory::clear_bits(self.alternate_function_select(), &bits.map(|bit| bit as u32)); + } + }, + _ => { + unsafe { + memory::set_bits(self.alternate_function_select(), &bits.map(|bit| bit as u32)); + } + }, + } + let data_address = self.data(); let pins: [WritablePin; N] = bits.map(|bit| WritablePin { data_address, bit }); @@ -246,6 +312,7 @@ pub enum Function { pub struct ReadablePinSetup { pub function: Function, + pub pull_up: Option, } pub struct ReadablePins { data_address: *mut u32, @@ -257,7 +324,7 @@ impl ReadablePins { } pub fn read_all(&self) -> [bool; N] { - unsafe { memory::read_bits(self.data_address, &self.pins.map(|pin| pin.bit)) } + unsafe { memory::read_bits(self.data_address, &self.pins.map(|pin| pin.bit as u32)) } } } #[derive(Clone, Copy)] @@ -285,10 +352,16 @@ impl WritablePins { } pub fn read_all(&self) -> [bool; N] { - unsafe { memory::read_bits(self.data_address, &self.pins.map(|pin| pin.bit)) } + unsafe { memory::read_bits(self.data_address, &self.pins.map(|pin| pin.bit as u32)) } } pub fn write_all(&mut self, values: [bool; N]) { - unsafe { memory::write_bits(self.data_address, &self.pins.map(|pin| pin.bit), values) } + unsafe { + memory::write_bits( + self.data_address, + &self.pins.map(|pin| pin.bit as u32), + values, + ) + } } pub fn update_all [bool; N]>(&mut self, updater: Updater) { self.write_all(updater(self.read_all())); @@ -296,17 +369,17 @@ impl WritablePins { pub fn clear_all(&mut self) { unsafe { - memory::clear_bits(self.data_address, &self.pins.map(|pin| pin.bit)); + memory::clear_bits(self.data_address, &self.pins.map(|pin| pin.bit as u32)); } } pub fn set_all(&mut self) { unsafe { - memory::set_bits(self.data_address, &self.pins.map(|pin| pin.bit)); + memory::set_bits(self.data_address, &self.pins.map(|pin| pin.bit as u32)); } } pub fn toggle_all(&mut self) { unsafe { - memory::toggle_bits(self.data_address, &self.pins.map(|pin| pin.bit)); + memory::toggle_bits(self.data_address, &self.pins.map(|pin| pin.bit as u32)); } } } @@ -323,17 +396,17 @@ impl WritablePin { } pub fn clear(&mut self) { unsafe { - memory::clear_bits(self.data_address, &[self.bit]); + memory::clear_bits(self.data_address, &[self.bit as u32]); } } pub fn set(&mut self) { unsafe { - memory::set_bits(self.data_address, &[self.bit]); + memory::set_bits(self.data_address, &[self.bit as u32]); } } pub fn toggle(&mut self) { unsafe { - memory::toggle_bits(self.data_address, &[self.bit]); + memory::toggle_bits(self.data_address, &[self.bit as u32]); } } } diff --git a/src/main--ideas.rs b/src/main--ideas.rs new file mode 100644 index 0000000..5684987 --- /dev/null +++ b/src/main--ideas.rs @@ -0,0 +1,59 @@ +#![no_std] +#![no_main] + +use panic_halt as _; + +use cortex_m_rt::entry; + +use my_library::{Bit, Color, setup_board}; + +const H: bool = true; +const L: bool = false; + +#[entry] +fn main() -> ! { + let board = setup_board(); + + let port_f = board.setup_port(Port::F); + + let switches = port_f.setup_readable_pins([Bit::Zero, Bit::Four], PinSetup { + alternate_function: false, + analog: false, + pullup: true, + pctl: false, + }); + + let rgb_led = port_f.setup_writable_pins([Bit::One, Bit::Three, Bit::Two], PinSetup { + alternate_function: false, + analog: false, + pctl: false, + }); + + // Integrate PWM for arbitrary color support + let rgb_led_driver = rgb_led.driver(); + + // Maybe? + let every_5_seconds = board.time_trigger(5); + + // Example of adding tasks + board.add_task( + some_kind_of_task, + 10, // priority maybe? + every_5_seconds, // trigger every 5 seconds + ); + + loop { + match switches.read_all() { + [L, L] => rgb_led_driver.set_color(Color::Green), + [L, H] => rgb_led_driver.set_color(Color::Blue), + [H, L] => rgb_led_driver.set_color(Color::Red), + [H, H] => rgb_led_driver.set_color(Color::Black), + } + } +} + + +fn some_kind_of_task() { + // ... +} + diff --git a/src/main.rs b/src/main.rs index dc1a174..f392c82 100644 --- a/src/main.rs +++ b/src/main.rs @@ -65,18 +65,18 @@ fn setup_port_f() { // unsafe { ptr::write_volatile(GPIOAMSEL_PORT_F, 0x00) } // 4) PCTL GPIO on PF4-0 - unsafe { - ptr::write_volatile(GPIO_PORTF_PCTL_R, 0x00000000); - } + // unsafe { + // ptr::write_volatile(GPIO_PORTF_PCTL_R, 0x00000000); + // } // 5) PF4,PF0 in, PF3-1 out // unsafe { // ptr::write_volatile(GPIO_PORTF_DIR_R, 0x0E); // } // 6) disable alt funct on PF7-0 - unsafe { - ptr::write_volatile(GPIO_PORTF_AFSEL_R, 0x00); - } + // unsafe { + // ptr::write_volatile(GPIO_PORTF_AFSEL_R, 0x00); + // } // enable pull-up on PF0 and PF4 unsafe { ptr::write_volatile(GPIO_PORTF_PUR_R, 0x11); @@ -99,42 +99,44 @@ fn output_to_port_f(value: u8) { } } -// #[entry] -// fn main() -> ! { -// let board = setup_board(); -// let port_f = board.setup_gpio_port(Port::F, PortSetup); - -// let switches = port_f.setup_readable_pins([Bit::Zero, Bit::Four], ReadablePinSetup); -// let [sw1, sw2] = switches.pins(); - -// let mut rgb_led = port_f.setup_writable_pins(&[Bit::One, Bit::Three, Bit::Two], WritablePinSetup { drive: PinDrive::Digital }); - -// loop { -// match switches.read_all() { -// [L, L] => rgb_led.write_all([L, H, L]), -// [L, H] => rgb_led.write_all([L, L, H]), -// [H, L] => rgb_led.write_all([L, H, L]), -// [H, H] => rgb_led.write_all([L, L, L]), -// } -// } -// } - #[entry] fn main() -> ! { - setup_port_f(); + let board = setup_board(); + let port_f = board.setup_gpio_port(Port::F, PortSetup); + + let switches = port_f.setup_readable_pins(&[Bit::Zero, Bit::Four], ReadablePinSetup { + function: Function::Digital, + }); + let [sw1, sw2] = switches.pins(); + + let mut rgb_led = port_f.setup_writable_pins(&[Bit::One, Bit::Three, Bit::Two], WritablePinSetup { function: Function::Digital }); loop { - let status = input_from_port_f(); - - match status { - 0x00 => output_to_port_f(RED | GREEN), - 0x01 => output_to_port_f(RED), - 0x10 => output_to_port_f(GREEN), - 0x11 => output_to_port_f(BLACK), - // Impossible case - _ => output_to_port_f(BLUE), + match switches.read_all() { + [L, L] => rgb_led.write_all([L, H, L]), + [L, H] => rgb_led.write_all([L, L, H]), + [H, L] => rgb_led.write_all([L, H, L]), + [H, H] => rgb_led.write_all([H, L, L]), } } } +// #[entry] +// fn main() -> ! { +// setup_port_f(); + +// loop { +// let status = input_from_port_f(); + +// match status { +// 0x00 => output_to_port_f(RED | GREEN), +// 0x01 => output_to_port_f(RED), +// 0x10 => output_to_port_f(GREEN), +// 0x11 => output_to_port_f(BLACK), +// // Impossible case +// _ => output_to_port_f(BLUE), +// } +// } +// } + // TODO: implement an extremely simple example of the task system (using a timer trigger) that is a traffic light (green -> yellow -> red -> green...)