From 231301b9cf71fcc5ef796e9f2deb91233ec29df9 Mon Sep 17 00:00:00 2001
From: J / Jacob Babich <jacobbabichpublic+git@gmail.com>
Date: Thu, 14 Apr 2022 18:49:58 -0400
Subject: [PATCH] "more proper" data address offset

---
 src/lib/gpio/pins.rs  |  6 +++---
 src/lib/gpio/ports.rs | 16 +++++++++++++---
 src/lib/registers.rs  |  2 ++
 3 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/src/lib/gpio/pins.rs b/src/lib/gpio/pins.rs
index 688becb..f35e070 100644
--- a/src/lib/gpio/pins.rs
+++ b/src/lib/gpio/pins.rs
@@ -210,7 +210,7 @@ pub fn setup_readable_pins<const N: usize>(
         _ => todo!(),
     }
 
-    let data_address = port.data();
+    let data_address = port.data(&pins);
 
     let pins: [ReadablePin; N] = pins.map(|bit| ReadablePin { data_address, bit });
 
@@ -296,9 +296,9 @@ pub fn setup_writable_pins<const N: usize>(
         _ => todo!(),
     }
 
-    let data_address = port.data();
+    let data_address = port.data(&pins);
 
-    let pins: [WritablePin; N] = pins.map(|bit| WritablePin { data_address, bit });
+    let pins: [WritablePin; N] = pins.map(|pin| WritablePin { data_address, bit: pin });
 
     WritablePins { data_address, pins }
 }
diff --git a/src/lib/gpio/ports.rs b/src/lib/gpio/ports.rs
index ae37894..747a12c 100644
--- a/src/lib/gpio/ports.rs
+++ b/src/lib/gpio/ports.rs
@@ -58,9 +58,19 @@ impl Port {
     /// The memory address of the data (DATA) register for this port
     ///
     /// Page 662 of data sheet
-    pub(super) fn data(&self) -> *mut u32 {
-        const OFFSET: u32 = 0x3FC;
-        (self.base() + OFFSET) as *mut u32
+    pub(super) fn data(&self, pins: &[Pin]) -> *mut u32 {
+        // Extra guidance provided by
+        // http://shukra.cedt.iisc.ernet.in/edwiki/EmSys:TM4C123GXL_GPIO_-_Read_Write_Data_Register
+        // because the data sheet was a bit hard to understand when thinking about why
+        // the C code I was referencing used an offset of 0x3FC
+        let mut offset = 0;
+
+        for pin in pins {
+            let bit = (*pin as u32) + 2;
+            offset |= 1 << bit;
+        }
+
+        (self.base() + offset) as *mut u32
     }
 
     /// The memory address of the digital enable (DEN) register for this port
diff --git a/src/lib/registers.rs b/src/lib/registers.rs
index f26b3cf..471adfd 100644
--- a/src/lib/registers.rs
+++ b/src/lib/registers.rs
@@ -12,3 +12,5 @@ pub mod system {
     // TODO: page 340
     pub const RCGCGPIO: *mut u32 = (BASE + 0x608) as *mut u32;
 }
+
+// TODO: delete this file
\ No newline at end of file